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Scalable (yet Precise) Timing Analysis

Wang Yi, Uppsala University

Abstract:

Timing analysis is of crucial importance in embedded systems design to ensure that critical real-time requirements are guaranteed. Essentially, the role of timing analysis is to estimate the worst-case response time of software components running on the same execution platform and thus sharing hardware resources. A huge amount of research effort has been accomplished on this topic by different research communities. In this talk, we present an overview on the essential past achievements and some open challenges.  Our observation is that existing approaches suffer from either scalability or precision problems due to the inadequate levels of abstraction, in particular of the underlying timed models. These are either too expressive or too abstract which leads to inefficient or imprecise analysis.  We present a new graph-based model that allows us to precisely capture the timing behavior of embedded software and yet keep the analysis problems tractable. For the theoretically intractable cases of interest, we present a refinement technique, which allows for effective guidance to significantly prune away the global search space and to efficiently verify the desired timing properties in most real applications.  We outline our ongoing project, developing a new timing analysis tool in Uppsala.

 Presentation Slides

Biography:

Wang Yi received his Ph.D. in Computer Science in 1991 from Chalmers University of Technology. Currently he is a professor at Uppsala  University, holding the chair of Embedded Systems. He is a fellow of the IEEE. He has served on the TPC for many conferences in embedded systems areas. He is on the steering committee of EMSOFT and ESWEEK. He is a co-founder of UPPAAL, a model checker for concurrent and real-time systems. For the developement of UPPAAL, he received the 2003 CAV Award. His current interests include techniques and tools for modeling and verification, timing analysis, real-time scheduling, and their application in embedded systems design. He received
the Outstanding paper award of ECRTS 2012 and Best Paper Awards of RTSS 2009 and DATE 2013. He is a keynote speaker of ETAPS 2015.